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Brand Name : RENESAS
Model Number : R5F51305ADFM#30
Place of Origin : original
MOQ : 1
Price : Negotiable
Payment Terms : L/C, D/A, D/P, T/T, Western Union, MoneyGram
Supply Ability : 999999
Delivery Time : 1-3 days
Packaging Details : standard
Core Size : 32-Bit Single-Core
Speed : 32MHz
Connectivity : I²C, LINbus, SCI, SPI
Peripherals : DMA, LVD, POR, PWM, WDT
Program Memory Size : 128KB (128K x 8)
RAM Size : 16K x 8
PN : R5F51305ADFM#30
R5F51305ADFM#30 MCU Microcontroller Unit
32-Bit Single-Core 32MHz 128KB FLASH memory Package 64-LFQFP
Core Size | | |
Speed | 32MHz | |
Connectivity | I²C, LINbus, SCI, SPI | |
Peripherals | DMA, LVD, POR, PWM, WDT | |
Number of I/O | 52 | |
Program Memory Size | | |
Program Memory Type | FLASH | |
EEPROM Size | 8K x 8 | |
RAM Size | 16K x 8 | |
Voltage - Supply (Vcc/Vdd) | 1.8V ~ 5.5V | |
Data Converters | A/D 14x12b; D/A 2x8b | |
Oscillator Type | Internal | |
Operating Temperature | -40°C ~ 85°C (TA) | |
Mounting Type | Surface Mount | |
Package / Case | 64-LQFP | |
Supplier Device Package | 64-LFQFP (10x10) |
Features
■ 32-bit RX CPU core
• Max. operating frequency: 32 MHz
Capable of 50 DMIPS in operation at 32 MHz
• Accumulator handles 64-bit results (for a single instruction) from 32-bit × 32-bit operations
• Multiplication and division unit handles 32-bit × 32-bit operations
(multiplication instructions take one CPU clock cycle)
• Fast interrupt
• CISC Harvard architecture with 5-stage pipeline
• Variable-length instructions, ultra-compact code
• On-chip debugging circuit
■ Low power design and architecture
• Operation from a single 1.8-V to 5.5-V supply
• Three low power consumption modes
• Low power timer (LPT) that operates during the software standby state
• Supply current
High-speed operating mode: 96 µA/MHz
Supply current in software standby mode: 0.37 µA
• Recovery time from software standby mode: 4.8 µs
■ On-chip flash memory for code, no wait states
• 64 K/128 K/256 K/383 K/512 Kbytes
• Operation at 32 MHz, read cycle of 31.25 ns
• No wait states for reading at full CPU speed
• Programmable at 1.8 V
• For instructions and operands
■ On-chip data flash memory
• 8 Kbytes (1,000,000 program/erase cycles (typ.))
• BGO (Background Operation)
■ On-chip SRAM, no wait states
• 10 K/16 K/32 K/48 Kbytes size capacities
■ DTC
• Four transfer modes
• Transfer can be set for each interrupt source.
■ ELC
• Module operation can be initiated by event signals without using
interrupts.
• Linked operation between modules is possible while the CPU is sleeping.
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R5F51305ADFM#30 MCU Microcontroller Unit 32Bit Single Core 128KB FLASH Memory Images |